page 1 of 7 ?2005 peregrine semiconductor corp. all rights reserved. document no. 70-0166-02 www.psemi.com 4x4mm 20 lead qfn rfc rf1 rf2 ctrl1 ctrl2 cmos control driver the PE4257 is a high-isolation ultracmos? switch designed for wireless applications, covering a broad frequency range from near dc up to 3000 mhz. this single-supply spdt switch integrates a two-pin cmos control interface. it also provides low insertion loss with extremely low bias requirements while operating on a single 3-volt supply. in a typical wireless application, the PE4257 provides unprecedented isolation and integration. the PE4257 is manufactured in peregrine?s patented ultra thin silicon (utsi?) cmos process, offering the performance of gaas with the economy and integration of conventional cmos. product specification 50 ? spdt absorptive ultracmos? dc ? 3.0 ghz rf switch product description figure 1. functional diagram PE4257 features ? 50 ? characteristic impedance ? integrated 50 ? 0.25 watt terminations ? high input ip3 > +55 dbm ? high isolation 64 db at 1000 mhz ? low insertion loss: typically 0.75 db at 1000 mhz and 0.95 db at 2000 mhz ? lv cmos two-pin control ? single +3 volt supply operation ? low current consumption: 8 a parameter condition minimum typical maximum units operating frequency 1 dc 3000 mhz insertion loss 1000 mhz 2000 mhz 3000 mhz 0.75 0.95 1.2 0.95 1.15 1.4 db isolation input to output 1000 mhz 2000 mhz 3000 mhz 61 46 40 64 50 44 db isolation output to output 1000 mhz 2000 mhz 3000 mhz 57 54 42 63 60 48 db input ip2 5 mhz - 1000 mhz 80 dbm input ip3 5 mhz - 1000 mhz 50 55 dbm input 1db compression 2 1000 mhz 29 31 dbm switching time 50% ctrl to 10 / 90 rf 2 s video feedthrough 3 5 mhz - 1000 mhz 15 mv pp notes: 1. device linearity will begin to degrade below 1 mhz. 2. note absolute maximum ratings in table 3. 3. measured with a 1 ns risetime, 0/3 v pulse and 500 mhz bandwidth figure 2. package type table 1. electrical specifications @ +25 c, v dd = 3.0 v (z s = z l = 50 ? )
product specification PE4257 page 2 of 7 document no. 70-0166-02 ultracmos? rfic solutions ?2005 peregrine semiconductor corp. all rights reserved. 4x4mm 20-lead qfn gnd 15 14 13 12 11 3 4 5 2 1 17 16 18 19 20 9 10 8 7 6 ctrl2 gnd gnd gnd gnd gnd rfc vdd ctrl1 vss/gnd gnd gnd gnd rf2 gnd, rf2 term. gnd gnd, rf1 term. rf1 gnd gnd no. name description 1 gnd rf ground 2 gnd rf ground 3 1 rf1 rf i/o 4 gnd rf ground 5 gnd rf ground 6 gnd rf ground 7 gnd rf ground 8 1 rfc rf common 9 gnd rf ground 10 gnd rf ground 11 gnd rf ground 12 gnd rf ground 13 1 rf2 rf i/o 14 gnd rf ground 15 gnd rf ground 16 2 ctrl2 control 2 17 2 ctrl1 control 1 18 3 vss / gnd negative supply option 19 gnd digital ground 20 vdd supply pad gnd rf ground pad table 2. pin descriptions table 3. absolute maximum ratings electrostatic discharge (esd) precautions when handling this ultracmos? device, observe the same precautions that you would use with other esd-sensitive devices. although this device contains circuitry to protect it from damage due to esd, precautions should be taken to avoid exceeding the rating specified. latch-up avoidance unlike conventional cmos devices, ultracmos? devices are immune to latch-up. table 4. dc electrical specifications @ 25 c notes: 1. rf pins 3, 8, and 13 must be at 0 vdc. the rf pins do not require dc blocking capacitors for proper operation if the 0 vdc requirement is met. 2. pins 16 and 17 are the cmos controls that set the four operating states. 3. connect pin 18 to gnd to enable the negative voltage generator. connect pin 18 to v ss (-3 v) to bypass and disable internal -3 v supply generator. see paragraph ?switching frequency.? symbol parameter/condition min max unit v dd power supply voltage -0.3 4.0 v v i voltage on ctrl input -0.3 v dd + 0.3 v p rf rf power on rfc, rf1, rf2 on port/ terminated port 33/24 dbm t st storage temperature -65 +150 c t op operating temperature -40 +85 c v esd esd voltage (human body model) 1000 v parameter min typ max unit v dd power supply 2.7 3.0 3.3 v i dd power supply current (v dd = 3v, v cntl = 3v) 8 20 a control voltage high 0.70 v dd v control voltage low 0 0.30 v dd v switching frequency the PE4257 has a maximum 25 khz switching rate when the internal negative voltage generator is used (pin 18=gnd). the rate at which the PE4257 can be switched is only limited to the switching time if an external -3 v supply is provided at (pin18=v ss ). figure 3. pin configuration (top view) absolute maximum rati ngs are those values listed in the above table. exceeding these values may cause permanent device damage. functional operation should be restricted to the limits in the dc electrical specifications table. exposure to absolute maximum ratings for extended periods may affect device reliability.
product specification PE4257 page 3 of 7 ?2005 peregrine semiconductor corp. all rights reserved. document no. 70-0166-02 www.psemi.com table 5. truth table ctrl1 ctrl2 rfc ? rf1 rfc ? rf2 low low off off low high off on high low on off high high n/a 1 n/a 1
product specification PE4257 page 4 of 7 document no. 70-0166-02 ultracmos? rfic solutions ?2005 peregrine semiconductor corp. all rights reserved. typical performance data @ 25c (unless otherwise noted) (50-ohm impedance) figure 4. insertion loss ? input - output figure 5. rf1 to rf2 isolation figure 6. isolation ? rfc to rf1/rf2 figure 7. return loss
product specification PE4257 page 5 of 7 ?2005 peregrine semiconductor corp. all rights reserved. document no. 70-0166-02 www.psemi.com evaluation kit the spdt switch evaluation kit board was designed to ease customer evaluation of the PE4257 spdt switch. the rf common port is connected through a 50 ? transmission line to j2. port 1 and port 2 are connected through 50 ? transmission lines to j1 and j3. a through transmission line connects sma connectors j4 and j5. this transmission line can be used to estimate the loss of the pcb over the environmental conditions being evaluated. the board is constructed of a four metal layer fr4 material with a total thickness of 0.031?. the transmission lines were designed using a coplanar waveguide with ground plane (28 mil core, 47.6 mil width, 30mil gap). note the number of vias surrounding the device in the layout shown in figure 8. these vias are critical for obtaining the specified isolation performance for the device shown in this datasheet. j6 provides a means for controlling dc and digital inputs to the device. the provided jumpers short the package pin to ground for logic low. when the jumper is removed, the pin is pulled up to vdd for logic high. when the jumper is in place, 3 a of current will flow through the 1 m ? pull up resistor. this extra current should not be attributed to the requirements of the device. figure 8. evaluation board layouts figure 9. evaluation board schematic peregrine specification 101/0151 peregrine specification 102/0198
product specification PE4257 page 6 of 7 document no. 70-0166-02 ultracmos? rfic solutions ?2005 peregrine semiconductor corp. all rights reserved. 1.00 1.00 2.00 2.00 0.23 0.10 c a b exposed pad 4.00 detail a 16 15 11 5 1 6 20 10 0.50 typ 2.00 typ 0.55 2 1 detail a 0.18 0.18 0.435 0.435 seating plane 0.08 c 0.10 c 0.020 0.20 ref exposed pad & terminal pads 0.80 - c - 2.00 x 2.00 2.00 2.00 4.00 4.00 - b - - a - index area 0.25 c 2. coplanarity applies to the exposed heat sink slug as well 1. dimension applies to metallized terminal and is measured as the terminals. between 0.25 and 0.30 from terminal tip. 20-lead 4x4 qfn table 6. ordering information figure 10. package drawing order code part marking description package shipping method 4257-01 4257 PE4257-20qfn 4x4mm-75a 20-lead 4x4mm qfn 75 units / tube 4257-02 4257 PE4257-20qfn 4x4mm-3000c 20-lead 4x4mm qfn 3000 units / t&r 4257-00 PE4257-ek PE4257-20qfn 4x4mm-ek evaluation kit 1 / box 4257-51 4257 PE4257g-20qfn 4x4mm-75a green 20-lead 4x4mm qfn 75 units / tube 4257-52 4257 PE4257g-20qfn 4x4mm-3000c green 20-lead 4x4mm qfn 3000 units / t&r
product specification PE4257 page 7 of 7 ?2005 peregrine semiconductor corp. all rights reserved. document no. 70-0166-02 www.psemi.com sales offices the americas peregrine semiconductor corp. 9450 carroll park drive san diego, ca 92121 tel 858-731-9400 fax 858-731-9499 north asia pacific peregrine semiconductor k.k. 5a-5, 5f imperial tower 1-1-1 uchisaiwaicho, chiyoda-ku tokyo 100-0011 japan tel: +81-3-3502-5211 fax: +81-3-3502-5213 europe peregrine semiconductor europe commercial products: batiment maine 13-15 rue des quatre vents f- 92380 garches, france tel: +33-1-47-41-91-73 fax : +33-1-47-41-91-73 space and defense products: 180 rue jean de guiramand 13852 aix-en-provence cedex 3, france tel: +33(0) 4 4239 3361 fax: +33(0) 4 4239 7227 for a list of representatives in your area, please refer to our web site at: www.psemi.com data sheet identification advance information the product is in a formative or design stage. the data sheet contains design target specifications for product development. specifications and features may change in any manner without notice. preliminary specification the data sheet contains preliminary data. additional data may be added at a later date. peregrine reserves the right to change specifications at any time without notice in order to supply the best possible product. product specification the data sheet contains final data. in the event peregrine decides to change the specifications, peregrine will notify customers of the intended changes by issuing a dcn (document change notice). the information in this data sheet is believed to be reliable. however, peregrine assumes no liability for the use of this information. use shall be entirely at the user?s own risk. no patent rights or licenses to any circuits described in this data sheet are implied or granted to any third party. peregrine?s products are not designed or intended for use in devices or systems intended for surgical implant, or in other applications intended to support or sustain life, or in any application in which the failure of the peregrine product could create a situation in which personal injury or death might occur. peregrine assumes no liability for damages, including consequential or incidental damages, arising out of the use of its products in such applications. the peregrine name, logo, and utsi are registered trademarks and ultracmos is a trademark of peregrine semiconductor corp. south asia pacific peregrine semiconductor 28g, times square, no. 500 zhangyang road, shanghai, 200122, p.r. china tel: +86-21-5836-8276 fax: +86-21-5836-7652
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